1. Field
The present application relates to a transmission device, and in particular, to a transmission device which is used in a high-speed serial interface using differential signals.
2. Description of the Related Art
Recently, high-speed serial interfaces realizing transmission rates exceeding 1 Gbps have come into widespread use in, for example, data transfer between LSIs (large scale integrated circuits). Such high-speed serial interfaces include the interfaces in accordance with Serial ATA, PCI Express, 10 Gbit-Ethernet, and the like, where ATA stands for advanced technology attachment, PCI stands for peripheral component interconnect, and Ethernet is a registered trade mark of Xerox Corporation. (See, for example, Japanese Unexamined Patent Publication No. 2007-36848.) In order to maintain the waveshape quality in high-speed data signals transferred at high transmission rates as above, various values are specified in various standards for the variations in amplitudes and the common-mode voltage (i.e., the median voltage between the H (high) level signal and the L (low) level signal), the return loss, and the like. (See, for example, National Semiconductor, “LVDS Owner's Manual, Third Edition,” available online at the URL, http://www.national.com/appinfo/lvds/0,1798,100,00.html (accessed Jun. 26, 2007))
FIG. 29 is a diagram illustrating circuit constructions of a conventional transmission device 800a and a conventional reception device 900 which receives a differential signal outputted from the conventional transmission device 800a. The transmission device 800a comprises driver circuits 810 and 820. The driver circuit 810 is constituted by p-channel MOSFETs (metallic oxide semiconductor field effect transistors) 811 and 812, n-channel MOSFETs 813 and 814, and resistors Ra1, Ra2, Rb, and Rc. (Hereinafter, the p-channel MOSFETs are referred to as pMOSs, and the n-channel MOSFETs are referred to as nMOSs.)
An input signal IPX is applied to the gate of the pMOS 811, and the power-supply voltage VDDa is applied to the source of the pMOS 811 through the resistor Ra1. The drain of the pMOS 811 is connected to the drain of the nMOS 813. An input signal IP is applied to the gate of the nMOS 813, and the source of the nMOS 813 is grounded through the resistor Ra2. An input signal PD is applied to the gate of the PMOS 812, and the power-supply voltage VDDa is applied to the source of the PMOS 812 through the resistor Rb. The drain of the pMOS 812 is connected to the drain of the nMOS 814. An input signal PDX is applied to the gate of the nMOS 814, and the source of the nMOS 814 is grounded through the resistor Rc. The node between the drains of the pMOS 811 and the nMOS 813 is connected to the node between the drains of the pMOS 812 and the nMOS 814. (These nodes are indicated by filled circles in FIG. 29.) The output signal TXOP of the driver circuit 810 is outputted from the above nodes.
The driver circuit 820 has a similar circuit construction to the driver circuit 810 except that the input signals INX and IN respectively replace the input signals IPX and IP, and the output signal TXON replaces the output signal TXOP.
The reception device 900 is constituted by AC-coupling capacitors Ca1 and Ca2 and the resistors Rf1 and Rf2. The output signal TXOP of the driver circuit 810 is inputted into a terminal of the AC-coupling capacitor Ca1, and the output signal TXON of the driver circuit 820 is inputted into a terminal of the AC-coupling capacitor Ca2. The other terminals of the AC-coupling capacitors Ca1 and Ca2 are connected to each other through the resistors Rf1 and Rf2. In addition, a center-tap voltage VDDb is applied to the node between the resistors Rf1 and Rf2 (which are connected in series).
The pair of the input signals IPX and IP inputted into the driver circuit 810 and the pair of the input signals INX and IN inputted into the driver circuit 820 constitute a differential input signal. The two input signals inputted into each of the driver circuits 810 and 820 are identical logic signals. For example, during normal operation, when the input signals IP and IPX are at the H (high) level, the input signals IN and INX are at the L (low) level. When the input signals IP and IPX rise to the H (high) level and the input signals IN and INX fall to the L (low) level during normal operation, the pMOS 811 is turned off and the nMOS 813 is turned on in the driver circuit 810, so that the output signal TXOP of the driver circuit 810 falls to the L level. Similarly, the output signal TXON of the driver circuit 820 rises to the H level. Thus, each of the driver circuits 810 and 820 behaves as an inverter.
When the input signal PD is set at the L level and the input signal PDX is set at the H level in order to generate the common-mode voltage, both of the pMOS 812 and the nMOS 814 are turned on. At this time, the level of the output signal TXOP becomes equal to the voltage determined by resistance division of the power-supply voltage VDDa.
During power down, the input signals IP, IPX, IN, INX, PD, and PDX are held at such voltage levels as to turn off all of the pMOSs 811 and 812 and the nMOSs 813 and 814 in the driver circuits 810 and 820 and minimize the power consumption.
In addition, when the pMOS 811 and the nMOS 813 in the first stage are turned off and the pMOS 812 and the nMOS 814 in the second stage are turned on, the driver circuits 810 and 820 output the output signals TXOP and TXON at the common-mode voltage. At this time, the driver circuits 810 and 820 is in the “electrical idle” state specified by PCI Express.
The amplitudes of the output signals TXOP and TXON during normal operation and the common-mode voltage are determined according to the power-supply voltage VDDa and the magnitudes of resistance of the resistors Ra1, Ra2, Rb, Rc, Rf1, and Rf2. In order to satisfy the requirements for the return loss specified by the standards, for example, it is necessary to satisfy the equations, 1/50=1/Rf=1/Ra+1/Rb+1/Rc in the case where the magnitudes of resistance of the resistors Rf1 and Rf2 are 50 ohm and represented by Rf, the magnitudes of resistance of the resistors Ra1 and Ra2 are identical and represented by Ra, and the magnitudes of resistance of the resistors Rb and Rc are respectively represented by Rb and Rc. At this time, it is further necessary that the values Ra, Rb, and Rc include the on-resistance of the pMOSs 811 and 812 and the nMOSs 813 and 814.
The center-tap voltage VDDb in the reception device 900 may be 0 V. In addition, the AC-coupling capacitors Ca1 and Ca2 may be dispensed with so as to realize DC coupling, instead of the AC coupling. Further, it is possible to realize the pre-emphasis and the de-emphasis specified by PCI Express, by further arranging an output-stage circuit constituted by resistors and switchs realized by a pMOS, an nMOS as illustrated in FIG. 29.
The transmission device 800a, which realizes necessary magnitudes of current by resistance division as explained above, has the following advantages (1) to (5).
(1) The output amplitudes (i.e., the amplitudes of the output signals TXOP and TXON) are determined by the power-supply voltage VDDa and the magnitudes of resistance of the resistors Ra1, Ra2, Rb, Rc, Rf1, and Rf2. Since the resistors are passive elements, the variations in the power-supply voltage are directly reflected in the variations in the output amplitudes, and the output characteristics are expressed by a straight line passing through the point at which the power-supply voltage VDD a is 0 V and the output amplitude is 0 V. Therefore, it is easy to obtain the output amplitudes and the common-mode voltage at desired levels.
(2) The output amplitudes and the common-mode voltage are approximately identical under an identical design condition and an identical measurement condition.
(3) The rising time and the falling time of the output signals TXOP and TXON are small.
(4) The transmission device 800a exhibits superior return-loss characteristics, so that it is easy to realize desired return loss.
(5) The power consumption is low, since current flows basically only to the receiver side except that current flows from the power supply VDDa to the ground through the resistors arranged for determining the common-mode voltage.
Although the necessary current is obtained by the resistance division in the transmission device 800a, another transmission device using one or more current sources is also known.
FIG. 30 is a diagram illustrating a circuit construction of another conventional transmission device 800b together with the conventional reception device 900, which receives a differential signal outputted from the conventional transmission device 800b. The reception device 900 in FIG. 30 has the same circuit construction as the reception device 900 in FIG. 29. The transmission device 800b is constituted by current sources 830 and 831, pMOSs 832 and 833, nMOSs 834 and 835, and resistors Rd1 and Rd2.
The current source 830 receives a power-supply voltage VDDa at an input terminal, and supplies current Ia to the sources of the pMOSs 832 and 833. An input signal IPX is applied to the gate of the pMOS 832, and the drain of the pMOS 832 is connected to the drain of the nMOS 834. In addition, an input signal INX is applied to the gate of the pMOS 833, and the drain of the pMOS 833 is connected to the drain of the nMOS 835. The sources of the nMOSs 834 and 835 are connected to a terminal of another current source 831, the other terminal of which is grounded. Further, the node between the drains of the pMOS 832 and the nMOS 834 is connected to the node between the drains of the pMOS 833 and the nMOS 835 through a series connection of the resistors Rd1 and Rd2. In order to generate the common-mode voltage, half of the power-supply voltage VDDa (VDDa/2) is applied to the node between the resistors Rd1 and Rd2. The differential output signal having the two components TXOP and TXON can be obtained from both ends of the series connection of the resistors Rd1 and Rd2.
During normal operation, the input signals IP and IPX and the input signals IN and INX constitute a differential input signal, and the output signals TXOP and TXON invert, so that the transmission device 800b behaves as an inverter.
During power down, the input signals IP, IPX, IN, INX, PD, and PDX are at such voltage levels as to turn off all of the pMOSs 832 and 833 and the nMOSs 834 and 835 in the transmission device 800b and minimize the power consumption.
Although a terminal the voltage of which is fixed at the common-mode voltage is generated by using half of the power-supply voltage VDDa, there are other techniques for generating the common-mode voltage by using resistance division, amplifiers, feedback circuits, and the like.
The amplitudes of the output signals TXOP and TXON during normal operation and the common-mode voltage are depend on the current Ia of the current sources 830 and 831, the resistors Rd1, Rd2, Rf1, and Rf2, and the manner of generation of the common-mode voltage. The output impedances of the current sources 830 and 831 per se are basically infinite (very high). Therefore, in order to satisfy the standardized requirements for the return loss, for example, it is necessary that the magnitudes of resistance of the resistors Rd1 and Rd2 be 50 ohm when the magnitudes of resistance of the resistors Rf1 and Rf2 are 50 ohm.
Since the magnitude of the current flowing from the current source 830 through the series connection of the resistors Rd1 and Rd2 to the current source 831 is required to be identical to the magnitude of the current flowing from the current source 830 through the series connection of the resistors Rf1 and Rf2 to the current source 831, the magnitude of the current Ia which the current sources 830 and 831 are required to generate is twice the magnitude of the current required to flow through the series connection of the resistors Rf1 and Rf2.
Further, it is possible to realize the pre-emphasis and the de-emphasis specified by PCI Express, by further arranging an output-stage circuit constituted by current sources and switchs as the current sources 830 and 831 and the pMOSs 832 and 833 and the nMOSs 834 and 835 illustrated in FIG. 30.
The transmission device 800b, in which the current sources 830 and 831 supply necessary current as explained above, has the following advantages (1′) and (2′).
(1′) Since the current sources 830 and 831 can generate the current Ia which is approximately expected, the variations in the output signals TXOP and TXON caused by the variations in the power-supply voltages, the temperature, and the manufacturing process are small, and it is possible to suppress the variations in the amplitudes of the output signals TXOP and TXON generated under an identical condition, by suppressing the variations in the pMOSs 832 and 833 and the nMOSs 834 and 835.
(2′) Since the current sources 830 and 831 can be realized by a current-mirror circuit constituted by a plurality of MOSFETs, and the amplitudes of the output signals TXOP and TXON can be changed by the mirror ratio, it is easy to finely adjust the amplitudes of the output signals TXOP and TXON.
FIG. 31 shows an example of a current mirror circuit used as the current sources 830 and 831. The current mirror circuit of FIG. 31 is constituted by the number m of pMOSs 841-1 to 841-m, the number M of pMOSs 842-1 to 842-M, and a current source 840, which is connected to the drains of the m pMOSs 841-1 to 841-m. All of the pMOSs 841-1 to 841-m and the pMOSs 842-1 to 842-M have identical dimensions. The magnitude of the current outputted from the current source 840 is indicated by Iaa.
In the above current mirror circuit, the magnitude of the current Ia outputted from the drains of the M pMOSs 842-1 to 842-M (i.e., the output of each of the current sources 830 and 831) becomes (M/m)Iaa. In the case where all of the pMOSs 841-1 to 841-m and the pMOSs 842-1 to 842-M have identical dimensions, it is possible to finely adjust the magnitude of the current Ia outputted from the current source of FIG. 30 by changing the mirror ratio M/m, and therefore finely adjust the output signals TXOP and TXON.
However, the conventional transmission devices cannot concurrently satisfy various requirements which are specified by the various standards for maintaining the waveshape quality of high-speed data signals.
For example, the conventional transmission devices in which necessary current is obtained by resistance division as the transmission device 800a of FIG. 29 have the following problems (a) and (b).
(a) The output amplitudes of a transmission device in which necessary current is obtained by the resistance division are determined by the power-supply voltage and the magnitudes of resistance (e.g., the magnitudes of resistance of the resistors Ra1, Ra2, Rb, Rc, Rf1, and Rf2 in the transmission device 800a illustrated in FIG. 29). Since the resistors are passive elements, the variations in the power-supply voltage are directly reflected in the variations in the amplitudes of the output signals of the transmission device. Therefore, in some cases, the variations in the output signals TXOP and TXON do not satisfy the requirements specified by the various standards.
(b) Since the output amplitudes are determined by the power-supply voltage and the magnitudes of resistance, it is difficult to finely adjust the output amplitudes. Although it is necessary to change the magnitudes of resistance in order to adjust the output amplitudes, it is difficult to change the magnitudes of resistance since the terminating resistance is required to be maintained constant in order to satisfy the requirements for the return loss specified by the various standards.
Further, the conventional transmission devices in which necessary current is obtained from one or more current sources as the transmission device 800b of FIG. 30 have the following problems (c), (d), (e), and (f).
(c) Since the amplitudes of the output signals TXOP and TXON and the common-mode voltage are determined by the magnitude of the current outputted from the current sources 830 and 831, the expected amplitudes of the output signals TXOP and TXON in the transmission device 800b cannot be achieved when the current sources 830 and 831 do not supply the expected magnitude of current. In addition, when the magnitudes of current supplied by the current sources 830 and 831 do not approximately match, the common-mode voltage deviates from the voltage VDDa/2.
(d) When the dimensions of the current source increase, the capacitance increases, so that the rising time and the falling time of the output signals TXOP and TXON increase.
(e) It is difficult to satisfy the requirements for the return loss specified by the various standards. Although the output impedances of ideal current sources are infinite, the output impedances of the practical current sources are several kilo-ohm. In addition, the capacitance of a current source increases with the dimensions of the current source. Therefore, in the high-frequency range, the transmitter impedance decreases, so that the return loss deteriorates.
(f) The transmission device 800b has the resistors Rd1 and Rd2 for satisfying the requirements specified by the various standards. However, since it is necessary that the magnitude of the current flowing through the series connection of the resistors Rd1 and Rd2 be identical to the magnitude of the current flowing through the series connection of the resistors Rf1 and Rf2, the magnitude of the current Ia which the current sources 830 and 831 are required to generate is twice the magnitude of the current flowing through the series connection of the resistors Rf1 and Rf2. Therefore, it is necessary that the magnitude of the current Ia which the current sources 830 and 831 are required to generate be twice the magnitude of the current flowing through the series connection of the resistors Rf1 and Rf2, so that the current consumption increases. Even in the case where an amplifier or a feedback circuit is added (instead of application of half of the power-supply voltage VDDa to the node between the resistors Rd1 and Rd2 for generation of a terminal the voltage of which is fixed as illustrated in FIG. 30), the consumption current also increases.